4-42 fast and ls ttl data dual jk positive edge-triggered flip-flop the mc54/74f109 consists of two high-speed, completely independent transition clocked jk flip-flops. the clocking operation is independent of rise and fall times of the clock waveform. the jk design allows operation as a d flip-flop (refer to f74 data sheet) by connecting the j and k inputs together. q 1 cp c d 2 1 3 4 6 7 8 gnd c d1 j 1 k 1 cp 1 q 1 q 1 connection diagram s d j k q j 1 c d1 cp 1 s d1 q 1 5 s d1 15 16 14 13 11 10 9 v cc c d2 j 2 cp 2 q 2 q 2 12 s d2 k 2 q k 1 function table (each half) input output @ t n @ t n + 1 j k q q l h no change l l l h h h h l h l toggles h = high voltage level l = low voltage level t n = bit time before clock pulse t n + 1 = bit time after clock pulse j suffix ceramic case 620-09 n suffix plastic case 648-08 16 1 16 1 16 1 d suffix soic case 751b-03 6 10 mc54fxxxj ceramic mc74fxxxn plastic mc74fxxxd soic mc54/74f109 dual jk positive edge-triggered flip-flop fast ? schottky ttl ordering information logic symbol 5 7 4 2 1 11 14 12 9 15 v cc = pin 16 gnd = pin 8 s d j cp q q c d s d j cp q q c d 3 13 k k asynchronous inputs: low input to s d sets q to high level low input to c d sets q to low level clear and set are independent of clock simultaneous low on c d and s d makes both q and q high
4-43 fast and ls ttl data mc54/74f109 q s d q k cp c d logic diagram (one half shown) note: this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. j guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 54, 74 4.5 5.0 5.5 v t a operating ambient temperature range 54 55 25 125 c 54 0 25 70 i oh output current e high 54, 74 1.0 ma i ol output current e low 54, 74 20 ma dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage v il input low voltage 0.8 v guaranteed input low voltage v ik input clamp diode voltage 1.2 v i in = 18 ma v cc = min v oh output high voltage 54, 74 2.5 3.4 v i oh = 1.0 ma v cc = 4.50 v 74 2.7 3.4 v i oh = 1.0 ma v cc = 4.75 v v ol output low voltage 0.35 0.5 v i ol = 20 ma v cc = min i ih input high current 20 m a v in = 2.7 v v cc = max 100 m a v in = 7.0 v i il input low current (j, k and cp inputs) 0.6 ma v in = 0.5 v v cc = max (c d and s d inputs) 1.8 ma i os output short circuit current (note 2) 60 150 ma v out = 0 v v cc = max i cc power supply current 11.7 17 ma v cp = 0 v v cc = max notes: 1. for conditions shown as min or max, use the appropriate value specified under guaranteed operating ranges. 2. not more than one output should be shorted at a time, nor for more than 1 second.
4-44 fast and ls ttl data mc54/74f109 ac characteristics 54/74f 54f 74f t a = +25 c t a = 55 c to +125 c t a = 0 c to +70 c v cc = +5.0 v v cc = 5.0 v 10% v cc = 5.0 v 10% c l = 50 p f c l = 50 p f c l = 50 p f symbol parameter min typ max min max min max unit f max maximum clock frequency 100 125 70 90 mhz t plh propagation delay 3.8 5.3 7.0 3.8 9.0 3.8 8.0 ns t phl cp n to q n or q n 4.4 6.2 8.0 4.4 10.5 4.4 9.2 ns t plh propagation delay 2.5 5.2 7.0 2.5 9.0 2.5 8.0 ns t phl c dn or s dn to q n or q n 3.5 7.0 9.0 3.5 11.5 3.5 10.5 ns ac operating requirements 54/74f 54f 74f t a = +25 c t a = 55 c to +125 c t a = 0 c to +70 c v cc = +5.0 v v cc = 5.0 v 10% v cc = 5.0 v 10% symbol parameter min typ max min max min max unit t s (h) setup time, high or low 3.0 3.0 3.0 ns t s (l) j n or k n to cp n 3.0 3.0 3.0 ns t h (h) hold time, high or low 1.0 1.0 1.0 ns t h (l) j n or k n to cp n 1.0 1.0 1.0 t w (h) cp n pulse width, high 4.0 4.0 4.0 ns t w (l) or low 5.0 5.0 5.0 ns t w (l) c dn or s dn pulse width, low 4.0 4.0 4.0 ns t rec recovery time c dn or s dn to cp 2.0 2.0 2.0 ns
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